Port 1 (PDIR=0)
#11100b
P1.0 -   ()
P1.1 -   ()
P1.2 -   ()
P1.3 -  ()
1.4 -    TLE6240 ()
P1.5 -   ()
P1.6 - RS-  /OSCIN HIP9011 ()
P1.7 -   ()

Port 3 (PDIR=0)
#111001
P3.0 - KLINE RxD ()
P3.1 - KLINE TxD ()
P3.2 - OltPin    ()
P3.3 -     () (  9.6)
3.4 -      ()
3.5 -   ()
3.6 -     WR()
3.7 -    RD()

Port 4 (PDIR=0)
#0h
P4.0 -   3 ( 9 TLE6240G)
P4.1 -   2 ( 10 TLE6240G)
P4.2 -   1 ( 11 TLE6240G)
P4.3 -   4 ( 12 TLE6240G)
4.4 -   1 
4.5 -   4 
4.6 -   2 
4.7 -   3 

Port 5 (PDIR=0)
#100000
5.0 -     ( 1 TLE6240G)
5.1 -     ( 2 TLE6240G)
5.2 -     ( 3 TLE6240G)
5.3 -   SI (Serial Data Input)  
5.4 -   SCLK (Serial Clock)  
5.5 -   SO (Serial Data Output)  
P5.6 -   SCLK (Serial Clock) EEPROM
P5.7 -   SDA (Serial Address/Data I/O) EEPROM

Port 6 (PDIR=0)
#11010000
P6.0 - 15 -     (  64 ) ()
6.1 -      Phase 1 ()
6.2 -      Phase 2 ()
6.3 -  WE# = Write enable   ()
P6.4 -  57   (   ()) ()
P6.5 -      I10,I11,I20,I21 ()
6.6 -      Err2 ()
6.7 -      Err1 ()

Port 9 (PDIR=0)
#0h
P9.0 -   6 (Hold)   
9.1 -     ( 4 TLE6240G)
P9.2 -  
P9.3 -  
P9.4 -   ( BSP76  )
P9.5 -   ( BSP76  )
P9.6 -     () (  3.3)
9.7 -   #CS (Chip Select)   TLE6240G